June 15, 2009
PCB
   Reworked all plane layers and rearranged their order.
   Added text descriptors to each plane segment.
   Reworked Silkscreen.
   Cleaned up some of the traces around the ADCs just below the die.
  Changed the analog input traces so they overlap.
  Regenerated Planes, Silkscreen, Drill drawing, Gerber and IPC356 files.
  Rearranged some traces to balance layer density.
Schematic
  Moved reference designators on instances for legibility.




Modifications to 12-Channel Acquisition boards.
1) Change the routing of input signals. Route -In on L1 and +In on L2. Route input traces over each other as much as possible.
2) Swap L5 to L3. Fix plane near top center to include analog channel.
3) Swap L12 to L14. Fix plane near top center to include analog channel.
4) L4 & L5 seems to be similar.  
5) Add labeling to plane segments.
6) Don't touch anything else.
7) Silkscreen; project name V3
8) Look for alternative analog monitoring traces.
9) Move vias near RTD edge.

May 19, 2009
    Extended the GNDA to cover bottom of ADC Lay3 & 14
    Added more copper to plane layers where possible.
    No good alternation found for analog signal monitor, cleaned-up routes.
    Moved two vias near the RTD circuit inward
    Moved a single route off of Layer 12 under FPGA
    Moved a DCRestore line from Lay2 to Lay7
    Changed project name and silkscreen to Ver3
Notes:
    Had trouble with text on plane layers, can't make it negative (non-copper) without negative plane setting
    which causes other problems.  Took care to prevent shorts when placing plane text labels.
    Had trouble with hatching minimum distance after moving plane stackup
    Needed to change thermal assignment on modified plane layers. (buried type, which only means no spokes)
    
Additional Thoughts:
    Should we eliminate the LEDs all together or make stuffing them optional. 
    The ADC digital control lines could be distributed better across the three layers currently used.